First Supercomputer

CDC 6600

The one you see in the image is the world’s first supercomputer. Designed by Control Data Corporation, it is named as CDC 6600 and was released in 1964. Conseil Européen pour la Recherche Nucléaire (CERN), the one which discovered the presence of Higgs Boson, was the first organization to use this supercomputer as its mainframe computer. It used CDC 6600 for high energy nuclear physics research. The performance of this supercomputer is the awesome 1 MFLOPS (a core2duo computer’s performance will be in GFLOPS :-) ).

MFLOPS is a term that says “this computer can perform *10^6 floating point operations per second.”

GFLOPS is a term that says “this computer can perform *10^9 floating point operations per second.”

Computers are generally measured in the context of Floating Points (fractions) because these operations are complex than normal integer operations. (Even computers are scared of fractional mathematics :-) ). This complexity is hided from us through extraordinary speed of computers.

Seymour Cray

The processor design of CDC 6600 is sequential (executes one thread at a time) whereas today’s processors are parallel (executes more than one threads at a time which we name it as ‘multithreading’.). The main challenge with the production of high speed computers were the germanium based semiconductors which were used in the manufacture of computers.  Seymour Cray who is affectionately known as “father of supercomputing” found that the performance resulted from germanium based supercomputers cannot be improved further. So he was in need of alternate semiconductors which would increase the level of performance drastically. In the mean time, the semiconductor industry released the inconceivable silicon based transistors which made Cray the happiest man in the world. He used the silicon based semiconductors and started with his team to design the above machine which gave him ample results and the machine was released.

Around 60s the processors performed slower than their memory systems (RAM) just because the whole system was managed and controlled the single processor alone. "Everything done by the processor" is not the typical functionality of an ALU(not clear, don’t worry...... continue reading). Today this bottleneck is inverse, the memory system performs slower than that of the processor and requires a lot of effort to keep of the processor busy (parallel programming deals with this problem; we will see it in future posts). We can say Cray as the root cause for causing this inverse bottleneck. Yes, CDC 6600 gained the status of world’s first supercomputer just by utilizing the gap between the performance of the processor and the memory system of the sixties. He made an alternate way where he reduced the work of the 6600 processor where it tackles only the arithmetic and logic operation which gives a confined meaning to the word ALU (Arithmetic and Logic Operation unit). Other operations like housekeeping, input and output management etc are made through separate components which choreograph themselves with main CPU in a perfect harmony for great performance. The new design ran at 10 MHz speed which is 10 times faster than Stone Age computers of the 60’s. Compare the speed of today’s normal computer with the speed of the 1964’s supercomputer :-).

The whole machine was operated in a fashion known as barrel and slot.

Barrel – Ten number of Peripheral Processors (Processors taking care of Input and Output).

Slot – One main CPU.

At any instant, one PP (Peripheral Processor) was given control of the CPU, asking it to complete some task (if required). Control was then handed off to the next PP in the barrel. Programs were written, with some difficulty, to take advantage of the exact timing of the machine to avoid any "dead time" on the CPU (i.e. to keep the machine busy always). With the CPU running much faster than on other computers, each memory access took ten CPU clock cycles to complete, so by using ten PPs, each PP was guaranteed one memory access per machine cycle.

Cycles are the heart beat of processors. It is the main factor of speed. The speed specification of your processor which will be in GHz actually defines the number of cycles the processor produces and utilizes per second (i.e. 1Hz = 1 cycle per second). A typical cycle resembles a sine wave (not exactly, just resembles) where the processor operates on the rising and falling edge of the cycle. 

The basis for the divine performance of 6600 CPU is what would today be referred to as a RISC (Reduced Instruction Set Computer) system, one in which the processor is tuned to do instructions which are comparatively simple and have limited and well-defined access to memory.

Instruction Set is last level language before the machine language (0s and 1s). Instruction Set defines the set of instructions which are compatible for a particular type of processor. There are two types of Instruction Set, they are RISC and CISC (Complex Instruction Set Computer).

The philosophy of many other machines was toward using instructions which were complicated — for example, a single instruction which would fetch an operand from memory (storage outside the processor) and add it to a value in a register (storage inside the processor) which is the CISC model of computation. In the 6600, with the RISC model, loading the value from memory would require one instruction, and adding it would require a second. While slower in theory due to the additional memory accesses, the PPs offloaded this expense. This simplification also forced programmers to be very aware of their memory accesses, and therefore code deliberately to reduce them as much as possible.

In the beginning the CDC6600 machines ran a simple job-control system known as COS (Chippewa Operating System). Chippewa is the name of the hometown of Seymour Cray. Due to technical and support disadvantages over COS, the machines started using SIPROS (Simultaneous Processing Operating System) as their operating system which was being developed at the company's System Sciences Division in Los Angeles. SIPROS became popular, but in the mean time some engineers in CDC believed in COS and started to refactor it in Arden Hills, Minnesota assembly plant giving birth to MACE ([Greg] Mansfield And [Dave] Cahlander Executive). It retained the earlier COS file system, but made significant advances in code modularity to improve system reliability and adaptiveness to new storage devices. MACE was never an official product, although many customers were able to wrangle a copy from CDC. MACE was later used as the basis of Kronos, named after the Greek god of time. The main marketing reason for its adoption was the development of its TELEX time sharing feature and its BATCHIO remote batch feature. Kronos continued to use the COS/SCOPE 1 file system with the addition of a permanent file feature. An attempt to unify the SCOPE (Supervisory Control of Program Execution, an operating system for 6600 developed before MACE) and Kronos operating system products produced NOS, (Network Operating System). NOS was intended to be the sole operating system for all CDC machines, a fact CDC promoted heavily. Many SCOPE customers remained software-dependent on the SCOPE architecture, so CDC simply renamed it NOS/BE (Batch Environment), and were able to claim that everyone was thus running NOS. In practice, it was far easier to modify the Kronos code base to add SCOPE features than the reverse.

Thank you :-) 

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